By Yan Li, Deepak Goyal
This quantity presents a complete reference for graduate scholars and pros in either academia and at the basics, processing information, and functions of 3D microelectronic packaging, an pattern for destiny microelectronic applications. Chapters written by way of specialists hide the newest study effects and development within the following components: TSV, die processing, micro bumps, direct bonding, thermal compression bonding, complicated fabrics, warmth dissipation, thermal administration, thermal mechanical modeling, caliber, reliability, fault isolation, and failure research of 3D microelectronic applications. a number of photos, tables, and didactic schematics are integrated all through. This crucial quantity equips readers with an in-depth knowing of all points of 3D packaging, together with packaging structure, processing, thermal mechanical and moisture similar reliability issues, universal disasters, constructing parts, and destiny demanding situations, offering insights into key components for destiny examine and improvement.
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Extra resources for 3D Microelectronic Packaging: From Fundamentals to Applications
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Two W2W flows are schematically illustrated in Fig. 13. • Back-to-Face Flow: where the inactive side (back) of the top wafer is bonded to the active (front) side of the bottom wafer. This approach can enable multiple wafers with TSVs to be bonded one after the other, while retaining the back-toface connectivity between the die. • Face-to-Face Flow: where the active side of the top wafer is attached to the active side of the bottom wafer. This approach is less valued for stacking more than 2 wafers.
Hashimoto, M. Kimura, K. W. B. Yong, TSV MEOL (Mid End of Line) and packaging technology of mobile 3D-IC stacking, in Proceedings of the 64th Electronic Components and Technology Conference (ECTC), pp. 596–600, May 2014 45. N. Kumar, S. Ramaswami, J. Dukovic, J. Tseng, R. Ding, N. Rajagopalan, B. Eaton, R. Mishra, R. Yalamanchili, Z. Wang, S. Xia, K. Sapre, J. Hua, A. Chan, G. Mori, B. E. 62nd Electronic Components and Technology Conference, pp. 787–793. 6248922 46. E. Beyne, Reliable via-middle copper through-silicon via technology for 3-D integration.